EMMA 02

PTC-701

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Memory

The PTC-701 uses 16K of system ROM, 32K of bank-switched application ROM, 8K of fixed RAM, and up to 64K of bank-switched expansion RAM on a daughter card.

Memory Map (R1.7 / McDonalds)

0000-3EFF System ROM (16K) - OS, I/O drivers, bytecode interpreter
3F00-3FFF I/O - AMI 9217MLB memory-mapped registers (overrides ROM at these addresses)
4000-5FFF App ROM (8K window) - Bank-switched via 0x3FA2
6000-7FFF RAM (8K) - System variables, stacks, display buffer
8000-FFFF Expansion RAM (32K window) - 4×8K slots via 0x3FC0-0x3FC3 (daughter card)

Memory Map (R2.0 / EM)

0000-3EFF System ROM (16K) - OS, I/O drivers, bytecode interpreter
3F00-3FFF I/O - AMI 9217MLB memory-mapped registers (overrides ROM at these addresses)
4000-5FFF App ROM (8K window) - Bank-switched via 0x3FA2
6000-77FF App ROM (6K)
7800-7FFF RAM (2K) - System variables, stacks, display buffer
8000-FFFF Expansion RAM (32K window) - 4×8K slots via 0x3FC0-0x3FC3 (daughter card)

Bank Switching

The AMI gate array implements two independent bank-switching windows:

Window 1 - App ROM (0x4000-0x5FFF)

The 7-bit bank register at 0x3FA2 selects an 8K page from the App ROM

ROM address = bank × 256 + (CPU address - 0x4000)

The McDonald’s and EM app ROMs are 32K but only partially populated.

Register 0x3FA2 (write)
RAM shadow R1.7: M(0x604F) or R2.0 M(0x784F)
Page select bits 7 bits (bank & 0x7F), bit 7 = enable (always set via ORI 0x80)
Granularity 256 bytes (bank shifts base by 256 per increment)
CPU window 0x4000-0x5FFF
Window 2 - Expansion RAM (0x8000-0xFFFF)

Standard 8K page-select. Four slot registers each select an 8K page from the daughter card RAM. The firmware uses consecutive page assignments so the four slots form a contiguous 32K view that slides through the 64K expansion RAM.

Registers 0x3FC0-0x3FC3 (4 slot registers)
RAM counter R1.7: M(0x604E) or R2.0 M(0x784E)
Page size 8K bytes (standard page-select)
Slot 0 0x8000-0x9FFF (page = counter × 4)
Slot 1 0xA000-0xBFFF (page = counter × 4 + 1)
Slot 2 0xC000-0xDFFF (page = counter × 4 + 2)
Slot 3 0xE000-0xFFFF (page = counter × 4 + 3)
Max RAM 64K (mask 0x7 = 8 pages × 8K, wraps for values > 7)

RAM Organisation (R1.7: 0x6000-0x7FFF)

6000-601A System variables
604E Bank window 2 counter
604F Bank window 1 register (app ROM page / bank select shadow)
6050-6054 ROMCPY post-copy state: bank(50), dest.hi(51), dest.lo(52), src.hi(53), src.lo(54)
605A/5B Fixed var A (source address pointer)
605C/5D Fixed var B (byte count)
6056/57 Fixed var C (destination address)
6058/59 Fixed var D (field width)
605E/5F Fixed var VE (base pointer for indexed access)
6080-60BF Display buffer (2×32 bytes for HD44780 refresh)
60B7/B8/B9 24-bit banked ROM base pointer (bank:high:low)
60C0/C1/C2 BANKPTR result: decoded ROM pointer (bank, addr.hi, addr.lo)
60CA/CB App ROM sequential read pointer (for LD TOS.0, [RP])
6100-6119 Interpreter dispatch loop (copied from ROM 0x0500)
61FF Data stack (RD pointer, grows downward, 16-bit values)
62FF Return stack (R2 pointer, grows downward)
62DA-6306 Key translation table (45 bytes, loaded from app ROM at boot)

RAM Organisation (R2.0: 0x7800-0x7FFF)

7800-781A System variables
784E Bank window 2 counter
784F Bank window 1 register (app ROM page / bank select shadow)
785F/60 Fixed var VE (base pointer for indexed access)
7880-789F Display buffer (2×16 bytes for HD44780 refresh)
7900-7915 Interpreter dispatch loop (copied from ROM 0x0500)
797F Data stack (RD pointer, grows downward, 16-bit values)
79FF Return stack (R2 pointer, grows downward)

ROM Files

ptc701_r1.7.bin 16,384 bytes System ROM - OS, bytecode interpreter, I/O drivers (R1.7, dated 10-30-85)
ptcmcd.bin 32,768 bytes App ROM - McDonald’s inventory v3.0 (bytecoded data, not native 1802 code)
ptc701_r2.0.bin 16,384 bytes System ROM - OS, bytecode interpreter, I/O drivers (R2.0, dated 10-02-85)
ptc734c.bin 32,768 bytes App ROM - EM (bytecoded data, not native 1802 code)