VIS, Video Interface System
The Cidelsa uses the RCA-CDP1869 and CDP1876 Video Interface System (VIS), consisting of the CDP1869 address and sound generator and the CDP1876 colour video generator. Not all details of these two chips are described here but can be found in the data sheets available on the COMX Club pages.
1802 Output 3 to 7 are connected to the VIS as also described as OUT 3 to OUT 7 in the VIS data sheets.
Video Memory and resolution
Some of the Cidelsa games use different page and character RAM connected to the CDP1869/1876 as follows:
Altair and Destroyer: 1 KB page RAM and 2048*9 bit character RAM
Draco: 2 KB page Ram and 2048*9 bit character RAM .
The page RAM stores the ASCII code for each character position on the screen. The screen has also different sizes depending on the game: 1000 characters (25 columns x 40 lines) for Altair and Destroyer and 1080 characters (27 columns x 40 lines) for Draco. The Cidelsa screens are actually turned 90 degrees, so the top RIGHT corned is position 0 and can be accessed by memory location @F800 (before scrolling, where only Draco uses left/right scrolling). So the top left corner is accessed by memory location @FBC0 (@FC10 for Draco) which would be the bottom line on a screen that is not turned.
The character RAM stores the character definition for each of the 256 programmable characters (8x6 pixels) and can be accessed via memory location @F400-@F7FF. Character memory can be accessed via different methods see also the VIS data sheet. The '8th' bit is stored in character RAM based on the Q flag at the same moment the other 8 bits are stored via the memory locations mentioned above.
Note that 3 bits (out of the 9 bits!) per character line are used to select one out of 8 colours, the other 6 bits for the 6 pixels on the screen. A total of 8 foreground colours are available (with a limited choice of 4 per character and 1 per column of that character) and 8 background colours (defined for the whole screen).
Timing
The VIS runs on 5.626 MHz. This frequency is divided by 2 and output via the CPUCLK (pin 38), this could be used for timing of the CPU (2.813 MHz) but this is NOT done in the Cidelsa. Instead the Cidelsa runs on 3.579 MHz which is generated by a dedicated crystal connected to the 1802. The VIS is also responsible for the timing of the interrupt (only used in the Draco game and running at 50 Hz) and timing of the non display period via PREDISPLAY (pin 1). Video memory can only be accessed during the non display period which allows for execution of 2160 machine cycles based on a CPU running on 2.813 MHz and VIS running on 5.626 MHz. Provided that not more instructions are executed than the indicated maximum number of machine cycles video memory can be accessed during the interrupt routine (only used in the Draco game). Alternatively the program can be paused by waiting for a non display period by checking EF1.