The CDP18S606 board includes:
The PIO is defined on I/O group 8 with:
To define a system using the CDP18S606 select 'CDP18S606 1805, Q/F & PIO' from the CARD 1 Choice box. CPU boards are only supported in slot 1.
To specify the memory configuration press the CARD 1 button and the CDP18S606 Setup window will open. Press 'SAVE' to save the configuration.
A default CDP18S606 configuration can be loaded, see also Configurations. This configuration includes the CDP18S606 CPU board and a CDP18S640 A/A1 Display board.
The CDP18S606 Microboard has 1 RAM and 4 ROM sockets, 'RAM Socket' for 1 RAM chip and 'ROM Socket' for 4 ROM chips. For details see the CDP18S606 manual. The RAM socket chip size is fixed to 4Kx8, location of the chip can be selected in any of the 16 4K blocks.
In the CDP18S606 setup window the size of the 'ROM Socket' chips can be selected (1Kx8 or 2Kx8).
In 1Kx8 mode the ROM location can be selected by using the 'Setup ROM' button. All 1K chip locations will be in consecutive order with XU25 on the lowest address followed by XU27, XU24 and XU26.
In 2Kx8 mode the ROM location and memory size can be selected by using the 'Setup ROM' button. The XU27 and XU26 chip locations will be in consecutive order with U27 on the lowest address followed by 26, the same is valid for XU25 and XU24. When selecting memory size of 1Kx8 the ROM will be repeated twice in the 2K block.
Default configuration of the CDP18S606 is using a 4 KB RAM chip and no ROM chips (overlap with RAM). In this same configuration the CDP18S640 board includes the ut4.bin ROM at hex 8000 and an additional 1 KB RAM at hex 8C00.
Default CDP18S606 ROM/RAM file location is the Microboard directory (located in the application data directory, see Directory and File Structure). To change the location use the 'ROM XUxx' or 'RAM' buttons to browse for the file, do the same to change the filename or type in a new file name in the text field. Data can be loaded via files in either ROM or RAM. Files can also be loaded into RAM in run time by using the Memory Access buttons.
The binary, Intel hex and RCS Elf Emulator hex format are supported.
The PIO Window can be used to simulate the PIO, i.e. the CDP1851 I/O chip. The window can be activate or deactivated via the 'IO Window' checkbox.
The initial window will show both A and B ports as input but when either port is set to output, bit programmable or bi-directional (via the PIO control register, OUT 2) the window will switch to show input (switches active) or output (LEDs active) depending on the mode selected. The same is valid for the STB and RDY input switches and output LEDs which will become active in bit programmable mode.
The interrupt buttons INT 'A' and 'B' will become active when the PIO interrupt is enabled and a press on either button will send an interrupt signal to the emulated CPU and also activate EF1 or EF2.