CDP18S604B: CPU 1802 & CDP1852

The CDP18S604B board includes:

To define a system using the CDP18S604B select 'CDP18S604B 1802 & 1852' from the CARD 1 Choice box. CPU boards are only supported in slot 1.

To specify the memory configuration press the CARD 1 button and the CDP18S604B Setup window will open. Press 'SAVE' to save the configuration.

A default CDP18S604B configuration can be loaded, see also Configurations. This configuration includes the CDP18S604B CPU board, a CDP18S640 A/A1 Display board and a CDP18S641 UART board.

Memory Configuration and ROM/RAM Files

The CDP18S604B Microboard has a ROM and RAM socket. For details see the CDP18S604B manual. In the CDP18S604B setup window the size of the ROM socket chip can be selected (521x8, 1Kx8, 2Kx8 and 4Kx8). The RAM socket and total chip size is always 1Kx8.

The RAM and ROM locations can be selected by specifying a 1K, 2K or 4K block (1K for RAM and 1, 2 or 4K for ROM depending on chip size).

Default configuration of the CDP18S604B is using a 1 KB RAM socket from hex 0-3FF and a 1 KB ROM socket from hex 400-7FF. In this same configuration the CDP18S640 board includes the ut71.bin ROM at hex 8000 and an additional 1 KB RAM at hex 8C00.

Default CDP18S604B ROM/RAM file location is the Microboard directory (located in the application data directory, see Directory and File Structure). To change the location use the 'ROM' or 'RAM' buttons to browse for the file, do the same to change the filename or type in a new file name in the text field. Data can be loaded via files in either ROM or RAM. Files can also be loaded into RAM in run time by using the Memory Access buttons.

The binary, Intel hex and RCS Elf Emulator hex format are supported.

CDP1852 Window

The CDP1852 Window can be used to simulate the CDP1852 I/O chip. The window can be activate or deactivated via the 'IO Window' checkbox. A press on the INT button will send an interrupt signal to the emulated CPU and also activate EF2.